國際研討會議程表
Symposium Program

2008.6.11 ~ 12
台北世貿三館TWTC, Hall 3
免費入場Free Admission

時間2008.6.11
地點Conference Room A
09:00-12:00 Opening & opening keynote
台北國際半導體產業展開幕典禮
地點Conference Room B
13:00-17:00 Global Semiconductor Market Outlook
2008.6.12
Conference Room BConference Room A
Assembly, Packaging & TestingManufacturing
Conference Room B 
Low Power IC Design 

請於下表勾選欲參加之場次，本次研討會免費參加，座位有限，避免向隅，請提早登錄報名。

【研討會講義免費】每主題均備有講義，數量有限，送完為止。


2008.6.11 星期三

  Opening & opening keynote Venue：Conference Room A
TimeTopicSpeaker / Company
10:00-11:30 Opening & Opening keynote
台北國際半導體產業展開幕典禮		 Mr. Satoru Ito
Renesas Technology Corp.
Chairman & CEO
  Global Semiconductor Market Outlook Venue：Conference Room B
TimeTopicSpeaker / Company
13:00-13:30 Registration
13:30-13:40 Opening Mr. C.K. Lin
Chair of TSIA Marketing Information Committee
VP of Winbond
林正恭
TSIA市場資訊委員會主委
華邦電子副總經理
13:40-14:30 Global Marketing Trend and Outlook Mr.Mario Morales
Program VP, IDC
IDC 副總經理
14:30-15:10 Hi-Tech industry & convergence
for Computing		 Mr. Debashish Roy
Industry Sales Director, Microsoft Asia
Manufacturing Industries
微軟亞太區產業 行銷協理
15:10-15:30 Break
15:30-16:10 Communication Market Outlook Mr. Erwin Ysewijn
Vice President Marketing,
Access Business Communication
Solutions Business Group,
Infineon Technologies
英飛凌 副總經理


2008.6.12 星期四

  Manufacturing Venue：Conference Room A
TimeTopicSpeaker / Company
08:30-09:00 Registration
09:00-09:40 IMEC's Nanoelectronics Research Platform:
CMOS Scaling and Heterogeneous Integration 		Dr. Roger De Keersmaecker
Senior Vice President Strategic Relations, IMEC
CEO, IMEC Taiwan
09:40-10:20 Challenges of advanced DRAM design
manufacturing vs. ASIC		 Dr. Peter Poechmueller
Managing Director & Vice President,
Qimonda Xian
10:20-10:40 Break
10:40-11:20 32nm in Reach, Despite Engineering
and Cost Challenges		 Dr. Reza Arghavani
Fellow of Silicon System Group,
Applied Materials
11:20-12:00 3-D Integration with Through
Silicon Vias:An Etch Perspective 		Mr. Steve Lassig
Sr. Product Marketing Manager,
3D Integration Group, Lam Research Corp.


  Assembly, Packaging & Testing Venue：Conference Room B
TimeTopicSpeaker / Company
08:30~09:00 Registration
09:00~09:30 The collaboration of chip integration for foundry and
packaging and testing house		 Mr. TW Karta
Senior Director, TSMC
郭祖寬
台積電資深處長
09:30~10:00 CMOS MEMS opens up new opportunity for Taiwan Dr. Peter Chang
Deputy Director,
ITRI south / Micro Systems Technology
Center (MSTC)
張平
工研院南分院執行長室
微系統科技中心副主任
10:00~10:20 Break
10:20~10:50 A Symphony of Substrate – New Solution for
IC Minimization & Packaging		 Mr. Zach Lin
FC R&D Director,
Nan Ya PCB Corporation
林賢傑
南亞電路板 副廠長
10:50~11:20 The Changing Value of Test Mr. Thomas Herbst
Sr. Director of Marketing.
Verigy, Ltd.
11:20~11:50 IC Packaging Marketing Trends and Technical
Challenges		 Dr. Yu Po Wang
Director, SPIL
王愉博
矽品 處長
  Low Power IC Design Venue：Conference Room B
TimeTopicSpeaker / Company
13:00-13:30 Registration
13:30-13:40 Opening Dr. Cheng-Wen Wu,
Chairman of IC Design Committee/ TSIA
General Director of ITRI, SoC Technology
Center
吳誠文博士
TSIA 設計委員會主委/工研院晶片中心主任
13:40-14:20 Low Power Wireless SoC Design
Marketing Trend and Outlook		 Mr. Rick Jeng
President of Ralink Technology
鄭雙徽
雷凌科技 總經理
14:20-15:00 Low power design flow & example Mr. Larry Vivolo,
Director of Product Marketing, Synopsys
新思科技
15:00-15:10 Break
15:10-15:50 Low power IC Design from Foundry Perspective Dr. L.C. Lu
Deputy Director, TSMC
魯立忠
台積電 副處長
15:50-16:30 A Practical Approach to Reducing
Power Consumption of Complex SoCs		 Mr. Alan Wang
Director, ARM/Taiwan Country
王建鈞
ARM台灣分公司協理
16:30-17:10 Managing Power Efficiency in Nano-Meter Designs:
Removing Barriers to Adoption		 Mr. Frank Leu
Vice President, Cadence U.S
益華電腦